Products > OCTEON II MIPS64 Processors > Silicon
 
 
 MIPS64 cores on a single chip

OCTEON II CN61XX Multi-Core MIPS64 Processors

The OCTEON II CN61XX family of Multi-Core MIPS64 Processors targets SMB and Mid-level modular and fixed Enterprise platforms for networking and storage including Switches, Routers, UTM, Mainstream Control Plane, WLAN controllers, and NAS/iSCSI appliances.

The family includes 4 software and pin-compatible processors, with 2 to 4 cnMIPS64 v2 cores delivering a cumulative processing of up to 4.4GHz in a single chip, comprehensive application acceleration engines for packet processing, RAID, Encryption/Decryption and Regular expression, storage, 1MB of L2 cache, and innovative realtime PowerOptimizer™ features, HFA™ DPI, Authentik™ anti-counterfeiting technologies. CN61xx includes 8 latest standards-based SERDES I/O’s including 4 x1 PCIe Gen2, 4 SGMII/1 XAUI, and 2 RGMII.

The CN61XX processors provides 2x-4x performance increase over CN52xx family and has 2x the number of cores, 2x the amount of L2 cache when compared to other alternatives solutions at equivalent price points. The integrated HFA™ based DPI engine with integrated memory, provides for very high performance, cost effective solution for UTM/VPN/Firewall application. Mainstream Control plane processing solutions optimized for price and power are enabled with high-frequency cores up to 1.2GHz, large and highly-associative L1 and L2 caches, and 1066 DDR3 DRAM interface.

Supported by industry-standard software tool chains and operating systems, the CN61XX enables scalability from 1 to 4 cores and 400MHz to 4.8Ghz with the same hardware and software design. OCTEON II family is fully software compatible with the widely-adopted OCTEON Plus family, enabling straightforward software reuse.

   
OCTEON II CN61XX Chip MIPS64 SoC
Product Video
Multi-Core MIPS64 Processors
Related Links
 
OCTEON II CN61XX - Block Diagram

    OCTEON II CN61XX - Block Diagram MIPS64 SoC processors

OCTEON II CN61XX - Product Family

Device cnMIPS II cores Performance
Options
L2 Cache
Networking Interfaces
PCI-Express
Memory I/O
w/ ECC
Package
Maximum
Instructions
Per Second
AAP CP
CN6120 2 4.8B Y Y 1MB 8 SGMII and 2 RGMII (10 CONTROLLERS) 2x2
1x4
DDR3 Up to 1066MHz,
1 x72-bit
868 HSBGA
CN6130 4 9.6B Y Y

Device Options:
Device Speed Grade (600 = 600 MHz, 800 = 800 MHz, 1000 = 1GHz, 1200 = 1.2 GHz)

Option code for device family listed below:
AAP = Application Acceleration Processor: Includes RAID, encryption, RegEx acceleration, compression/decompression, networking, TCP acceleration, and QoS encryption
SCP = Communication Processor: Includes networking, TCP acceleration, and QoS

 


All contents are Copyright © 2000 - 2016 Cavium. All rights reserved.     Privacy Policy   |   Copyright Policy   |   Site Map